JZ

Jiangli Zhu

Micron: 8 patents #92 of 1,298Top 8%
VT Via Technologies: 2 patents #1 of 23Top 5%
📍 San Jose, CA: #182 of 6,906 inventorsTop 3%
🗺 California: #1,332 of 68,989 inventorsTop 2%
Overall (2020): #9,139 of 565,922Top 2%
10
Patents 2020

Issued Patents 2020

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
10877906 Scheduling of read operations and write operations based on a data bus mode Wei Wang, Ying Yu Tai, Samir Mittal 2020-12-29
10877835 Write buffer management Wei Wang, Ying Yu Tai, Ning Chen, Zhengang Chen, Cheng Yuan Wu 2020-12-29
10860219 Performing hybrid wear leveling operations based on a sub-total write counter Fangfang Zhu, Ning Chen, Ying Yu Tai 2020-12-08
10824554 Method and apparatus for efficiently sorting iteration with small sorting set Ying Yu Tai 2020-11-03
10761754 Adjustment of a pre-read operation associated with a write operation Zhenlei Shen, Zhengang Chen, Tingjun Xie 2020-09-01
10761739 Multi-level wear leveling for non-volatile memory Ying Yu Tai, Ning Chen 2020-09-01
10747614 Hybrid iterative error correcting and redundancy decoding operations for memory sub-systems Ying Yu Tai, Zhengang Chen 2020-08-18
10733107 Non-volatile memory apparatus and address classification method thereof Ying Yu Tai, Jiin Lai 2020-08-04
10713155 Biased sampling methodology for wear leveling Ying Yu Tai 2020-07-14
10672486 Refreshing data stored at a memory component based on a memory component characteristic component Fangfang Zhu, Ying Yu Tai 2020-06-02