Issued Patents 2020
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854247 | Apparatuses and methods to selectively perform logical operations | Harish N. Venkata | 2020-12-01 |
| 10839870 | Apparatuses and methods for storing a data value in a sensing circuitry element | Harish N. Venkata, Guy S. Perry | 2020-11-17 |
| 10832792 | Apparatuses and methods for adjusting victim data | Jason M. Brown | 2020-11-10 |
| 10832760 | Systems and methods for improving write preambles in DDR memory devices | David R. Brown, Gary L. Howe | 2020-11-10 |
| 10825494 | DFE conditioning for write operations of a memory device | Liang Chen, David R. Brown | 2020-11-03 |
| 10803924 | Internal write leveling circuitry | Ming-Bo Liu | 2020-10-13 |
| 10789996 | Shifting data in sensing circuitry | Harish N. Venkata, Guy S. Perry | 2020-09-29 |
| 10785067 | Analog multiplexing scheme for decision feedback equalizers | Raghukiran Sreeramaneni | 2020-09-22 |
| 10685696 | Apparatuses and methods for access based refresh timing | Jason M. Brown | 2020-06-16 |
| 10672441 | Gap detection for consecutive write operations of a memory device | Liang Chen, David R. Brown | 2020-06-02 |
| 10664173 | Write level initialization synchronization | Gary L. Howe, Liang Chen | 2020-05-26 |
| 10643679 | Write level arbiter circuitry | — | 2020-05-05 |
| 10600473 | Apparatuses and methods to perform logical operations using sensing circuitry | Harish N. Venkata | 2020-03-24 |
| 10534553 | Memory array accessibility | Gary L. Howe | 2020-01-14 |
| 10535387 | DQS gating in a parallelizer of a memory device | Liang Chen | 2020-01-14 |
| 10529409 | Apparatuses and methods to perform logical operations using sensing circuitry | Harish N. Venkata | 2020-01-07 |