Issued Patents 2020
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10643012 | Concurrent formal verification of logic synthesis | Michael S. Quayle, Eyal Odiz, Patrick Groeneveld, John W. Hagerman, Kshama Jambhekar +1 more | 2020-05-05 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10643012 | Concurrent formal verification of logic synthesis | Michael S. Quayle, Eyal Odiz, Patrick Groeneveld, John W. Hagerman, Kshama Jambhekar +1 more | 2020-05-05 |