Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10825511 | Device, system, and method to change a consistency of behavior by a cell circuit | Vivek K. De, Sanu K. Mathew, Sudhir K. Satpathy, Raghavan Kumar | 2020-11-03 |
| 10797858 | Unified hardware accelerator for symmetric-key ciphers | Sanu K. Mathew, Sudhir K. Satpathy, Vinodh Gopal | 2020-10-06 |
| 10755242 | Bitcoin mining hardware accelerator with optimized message digest and message scheduler datapath | Sudhir K. Satpathy, Sanu K. Mathew | 2020-08-25 |
| 10754619 | Self-calibrated von-neumann extractor | Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar | 2020-08-25 |
| 10705842 | Hardware accelerators and methods for high-performance authenticated encryption | Sanu K. Mathew, Sudhir K. Satpathy, Vinodh Gopal | 2020-07-07 |
| 10694217 | Efficient length limiting of compression codes | Sudhir K. Satpathy, Vinodh Gopal, James D. Guilford, Sanu K. Mathew | 2020-06-23 |
| 10635404 | Mixed-coordinate point multiplication | Sudhir K. Satpathy, Raghavan Kumar, Arvind Singh, Sanu K. Mathew | 2020-04-28 |
| 10606765 | Composite field scaled affine transforms-based hardware accelerator | Sudhir K. Satpathy, Sanu K. Mathew | 2020-03-31 |
| 10579339 | Random number generator that includes physically unclonable circuits | Sanu K. Mathew, Sudhir K. Satpathy | 2020-03-03 |
| 10579335 | Multiplier circuit for accelerated square operations | Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar | 2020-03-03 |
| 10530588 | Multi-stage non-linearly cascaded physically unclonable function circuit | Sanu K. Mathew, Sudhir K. Satpathy | 2020-01-07 |