Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10866902 | Memory aware reordered source | Ishwar Bhati, Udit Dhawan, Jayesh Gaur | 2020-12-15 |
| 10846093 | System, apparatus and method for focused data value prediction to accelerate focused instructions | Sumeet Bandishte, Jayesh Gaur, Hong Wang | 2020-11-24 |
| 10846084 | Supporting timely and context triggered prefetching in microprocessors | Anant Vithal Nori, Shankar Balachandran, Hong Wang | 2020-11-24 |
| 10776270 | Memory-efficient last level cache architecture | Jayesh Gaur, Ayan Mandal, Anant Vithal Nori | 2020-09-15 |
| 10754655 | Automatic predication of hard-to-predict convergent branches | Adarsh Chauhan, Hong Wang, Jayesh Gaur, Zeev Sperber, Sumeet Bandishte +4 more | 2020-08-25 |
| 10719355 | Criticality based port scheduling | Pooja Roy, Jayesh Gaur, Zeev Sperber, Alexandr Titov, Lihu Rappoport +5 more | 2020-07-21 |
| 10713053 | Adaptive spatial access prefetcher apparatus and method | Rahul Bera, Anant Vithal Nori, Hong Wang | 2020-07-14 |
| 10664281 | Apparatuses and methods for dynamic asymmetric scaling of branch predictor tables | Ragavendra Natarajan, Niranjan Soundararajan, Saurabh Gupta | 2020-05-26 |
| 10642621 | System, apparatus and method for controlling allocations into a branch prediction circuit of a processor | Ragavendra Natarajan, Niranjan Soundararajan | 2020-05-05 |
| 10579414 | Misprediction-triggered local history-based branch prediction | Niranjan Soundararajan, Saurabh Gupta, Rahul Pal, Ragavendra Natarajan, Daniel Deng +3 more | 2020-03-03 |
| 10559348 | System, apparatus and method for simultaneous read and precharge of a memory | Lavanya Subramanian, Kaushik Vaidyanathan, Anant Vithal Nori, Tanay Karnik | 2020-02-11 |