Issued Patents 2020
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10831483 | Memory mapped virtual doorbell mechanism | Bryan R. White, Ankur N. Shah, Altug Koker, Aditya Navale | 2020-11-10 |
| 10783084 | Sector cache for compression | Abhishek R. Appu, Atlug Koker, Joydeep Ray, Prasoonkumar Surti, Lakshminarayanan Striramassarma +4 more | 2020-09-22 |
| 10769078 | Apparatus and method for memory management in a graphics processing environment | Niranjan L. Cooray, Abhishek R. Appu, Altug Koker, Joydeep Ray, Balaji Vembu +7 more | 2020-09-08 |
| 10726517 | Page faulting and selective preemption | Altug Koker, Ingo Wald, Subramaniam Maiyuran, Prasoonkumar Surti, Balaji Vembu +4 more | 2020-07-28 |
| 10719447 | Cache and compression interoperability in a graphics processor pipeline | Tomas G. Akenine-Moller, Prasoonkumar Surti, Altug Koker, Jim K. Nilsson | 2020-07-21 |
| 10706493 | Apparatus and method for display virtualization using mapping between virtual and physical display planes | Yunbiao Lin, Changliang Wang, Satyanantha R. Musunuri, David J. Cowperthwaite, Bryan R. White +1 more | 2020-07-07 |
| 10657618 | Coarse grain coherency | Joydeep Ray, Altug Koker, James Valerio, Abhishek R. Appu, Stephen Junkins | 2020-05-19 |
| 10649956 | Engine to enable high speed context switching via on-die storage | Altug Koker, Prasoonkumar Surti, Subramaniam Maiyuran, Guei-Yuan Lueh, Abhishek R. Appu +7 more | 2020-05-12 |
| 10579382 | Method and apparatus for a scalable interrupt infrastructure | Rajesh M. Sankaran, Ankur N. Shah, Bryan R. White, Hema Chand Nalluri, Murali Ramadoss +3 more | 2020-03-03 |
| 10565676 | Thread prefetch mechanism | Adam T. Lake, Guei-Yuan Lueh, Balaji Vembu, Murali Ramadoss, Prasoonkumar Surti +8 more | 2020-02-18 |