Issued Patents 2020
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10754413 | Mechanism to enter or exit retention level voltage while a system-on-a-chip is in low power mode | Vasudev Bibikar, Aswin Ramachandran, Chin Seng Lu, Moorthy Rajesh | 2020-08-25 |