Issued Patents 2020
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10587248 | Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature | Harry Barowski, Werner Juchmes, Michael Kugel | 2020-03-10 |
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10587248 | Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature | Harry Barowski, Werner Juchmes, Michael Kugel | 2020-03-10 |