Issued Patents 2020
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10789403 | Grouping and partitioning of properties for logic verification | Rohit DUREJA, Alexander Ivrii, Robert L. Kanzelman | 2020-09-29 |
| 10621297 | Initial-state and next-state value folding | Robert L. Kanzelman, Pradeep Kumar Nalla, Raj Kumar Gajavelly, Dheeraj Baby | 2020-04-14 |
| 10579770 | Scalable connectivity verification using conditional cut-points | Pradeep Kumar Nalla, Raj Kumar Gajavelly, Raja Bilwakeshwar Ivaturi | 2020-03-03 |
| 10540468 | Verification complexity reduction via range-preserving input-to-constant conversion | Raj Kumar Gajavelly, Robert L. Kanzelman, Alexander Ivrii, Pradeep Kumar Nalla | 2020-01-21 |