Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10839931 | Zero test time memory using background built-in self-test | Eric D. Hunt-Schroeder, Michael A. Ziegerhofer | 2020-11-17 |
| 10795430 | Activity-aware supply voltage and bias voltage compensation | Kushal Kamal | 2020-10-06 |
| 10796750 | Sequential read mode static random access memory (SRAM) | Akhilesh Patil, Eric D. Hunt-Schroeder | 2020-10-06 |
| 10748635 | Dynamic power analysis with per-memory instance activity customization | Kyle Holmes | 2020-08-18 |
| 10705797 | Parallel-prefix adder and method | Ranjan B. Lokappa | 2020-07-07 |
| 10566058 | Ternary content addressable memory | Suparna Bhattacharya, Arvind Kumar | 2020-02-18 |
| 10551436 | Customer-transparent logic redundancy for improved yield | John R. Goss, Eric D. Hunt-Schroeder, Andrew K. Killorin | 2020-02-04 |