Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10839156 | Address normalization using deep learning and address feature vectors | Satyam Saxena, Sourav Kumar Agarwal | 2020-11-17 |
| 10840892 | Fully digital, static, true single-phase clock (TSPC) flip-flop | Krishnan S. Rengarajan, Chethan Ramanna | 2020-11-17 |
| 10659017 | Low-power scan flip-flop | Krishnan S. Rengarajan, Chethan Ramanna | 2020-05-19 |