Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10734572 | Device with capping layer for improved residue defect and method of production thereof | Yi Jiang, Curtis Chun-I Hsieh, Juan Boon Tan | 2020-08-04 |
| 10734444 | Integrated circuits with integrated memory structures and capacitors and methods for fabricating the same | Yi Jiang, Curtis Chun-I Hsieh, Juan Boon Tan | 2020-08-04 |
| 10720580 | RRAM device and method of fabrication thereof | Curtis Chun-I Hsieh, Wei-Hui Hsu, Yi Jiang, Juan Boon Tan | 2020-07-21 |
| 10707358 | Selective shielding of ambient light at chip level | Juan Boon Tan, Kiok Boone Elgin Quek, Khee Yong Lim, Chim Seng Seet, Rajesh S. Nair | 2020-07-07 |
| 10693054 | MTJ bottom metal via in a memory cell and method for producing the same | Danny Pak-Chum Shum, Curtis Chun-I Hsieh, Yi Jiang, Juan Boon Tan, Benfu Lin | 2020-06-23 |
| 10651380 | Memory devices and methods of forming the same | Curtis Chun-I Hsieh, Wei-Hui Hsu, Yi Jiang, Juan Boon Tan | 2020-05-12 |
| 10608046 | Integrated two-terminal device with logic device for embedded application | Curtis Chun-I Hsieh, Juan Boon Tan, Soh Yun Siah, Hai Cong, Alex See +3 more | 2020-03-31 |
| 10593728 | Integrated circuits and methods for fabricating integrated circuits with magnetic tunnel junction (MTJ) structures | Curtis Chun-I Hsieh, Yi Jiang, Juan Boon Tan | 2020-03-17 |
| 10580968 | Integrated circuit with memory cells having reliable interconnection | Curtis Chun-I Hsieh, Yi Jiang, Juan Boon Tan | 2020-03-03 |
| 10566384 | Two pass MRAM dummy solution | Neha Nayyar, Curtis Chun-I Hsieh, Mahesh Bhatkar, Wenjun Liu, Juan Boon Tan | 2020-02-18 |
| 10535645 | Stitched devices | Wei Shao, Juan Boon Tan, Wei Liu | 2020-01-14 |