SS

Sushobhit Singh

CS Cadence Design Systems: 2 patents #41 of 328Top 15%
📍 Atrauli, IN: #3 of 9 inventorsTop 35%
Overall (2020): #117,317 of 565,922Top 25%
2
Patents 2020

Issued Patents 2020

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10783300 Systems and methods for extracting hierarchical path exception timing models Naresh Kumar, Beenish, Ankur Gulati, Vishal Karda, Shashank Rajendra Prasad 2020-09-22
10733346 Systems and methods for arc-based debugging in an electronic design 2020-08-04