Issued Patents 2020
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10540467 | System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design | Abner Luis Panho Marciano, Matheus Nogueira Fonseca, Ronalu Augusta Nunes Barcelos, Fabiano Peixoto | 2020-01-21 |