BR

Balbeer Singh Rathor

CS Cadence Design Systems: 1 patents #84 of 328Top 30%
📍 Morena, IN: #1 of 1 inventorsTop 100%
Overall (2020): #537,296 of 565,922Top 95%
1
Patents 2020

Issued Patents 2020

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10848352 Time based feed forward equalization (TFFE) for high-speed DDR transmitter Vinod Kumar, Aaron Willey 2020-11-24