Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10794954 | System and method for accelerating timing-accurate gate-level logic simulation | Kai-Hui Chang, Yueh-Shiuan Tsai | 2020-10-06 |
| 10726180 | Systems and methods for fixing X-pessimism from uninitialized latches in gate-level simulation | Kai-Hui Chang, Andrew Christopher Stein, Christopher S. Browy, Chi-Lai Huang | 2020-07-28 |
| 10666255 | System and method for compacting X-pessimism fixes for gate-level logic simulation | Kai-Hui Chang | 2020-05-26 |