Issued Patents 2019
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10268586 | Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests | Rodney E. Hooker, Terry Parks, Douglas R. Reed | 2019-04-23 |
| 10268587 | Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests | Rodney E. Hooker, Terry Parks, Douglas R. Reed | 2019-04-23 |
| 10235232 | Processor with approximate computing execution unit that includes an approximation control register having an approximation mode flag, an approximation amount, and an error threshold, where the approximation control register is writable by an instruction set instruction | Terry Parks, Rodney E. Hooker | 2019-03-19 |
| 10228944 | Apparatus and method for programmable load replay preclusion | Gerard M. Col, Colin Eddy | 2019-03-12 |
| 10228911 | Apparatus employing user-specified binary point fixed point arithmetic | Terry Parks | 2019-03-12 |
| 10216520 | Compressing instruction queue for a microprocessor | Matthew Daniel Day, Terry Parks | 2019-02-26 |
| 10209996 | Apparatus and method for programmable load replay preclusion | Gerard M. Col, Colin Eddy | 2019-02-19 |
| 10204056 | Dynamic cache enlarging by counting evictions | Stephan Gaskins | 2019-02-12 |
| 10198269 | Dynamic reconfiguration of multi-core processor | Terry Parks, Darius D. Gaskins | 2019-02-05 |
| 10175984 | Apparatus and method to preclude non-core cache-dependent load replays in an out-of-order processor | Gerard M. Col, Colin Eddy | 2019-01-08 |
| 10175732 | Domain-differentiated power state coordination system | Darius D. Gaskins | 2019-01-08 |