Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10296465 | Processor using a level 3 translation lookaside buffer implemented in off-chip or die-stacked dynamic random-access memory | Lizy Kurian John, Jee Ho Ryoo | 2019-05-21 |
| 10261915 | Intelligently partitioning data cache to allocate space for translation entries | Lizy Kurian John, Yashwant Marathe, Jee Ho Ryoo | 2019-04-16 |