Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10503655 | Data block sizing for channels in a multi-channel high-bandwidth memory | Mitesh R. Meswani | 2019-12-10 |
| 10503658 | Page migration with varying granularity | Arkaprava Basu | 2019-12-10 |
| 10296465 | Processor using a level 3 translation lookaside buffer implemented in off-chip or die-stacked dynamic random-access memory | Lizy Kurian John, Nagendra Gulur | 2019-05-21 |
| 10261915 | Intelligently partitioning data cache to allocate space for translation entries | Lizy Kurian John, Yashwant Marathe, Nagendra Gulur | 2019-04-16 |