Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10473717 | Methods and apparatus for test insertion points | — | 2019-11-12 |
| 10331826 | False path timing exception handler circuit | Prakash Narayanan, Saket Jalan | 2019-06-25 |
| 10184980 | Multiple input signature register analysis for digital circuitry | Naman Maheshwari, Prakash Narayanan | 2019-01-22 |