Issued Patents 2019
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10243573 | Phase syncronizing PLL output across reference and VCO clock domains | Jagdish Chand Goyal, Peeyoosh Mirajkar, Ashwin Ravisankar, Srikanth Manian, Srinivas Theertham | 2019-03-26 |