Issued Patents 2019
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521537 | Method and system of generating layout | Shien-Yang Wu, Wei-Chang Kung | 2019-12-31 |
| 10522396 | Methods of fabricating integrated circuit devices having reduced line end spaces | Chen-Yu Shyu, Ming-Shuoh Liang | 2019-12-31 |
| 10475703 | Structure and formation method of damascene structure | Tai-Yen Peng, Chia-Tien Wu | 2019-11-12 |
| 10361156 | Semiconductor device and manufacturing method thereof | Yu-Bey Wu, Dian-Hau Chen, Sheung-Hsuan Wei, Li-Yu Lee, Tai-Yang Wu | 2019-07-23 |
| 10170355 | Semiconductor device and manufacturing method thereof | Yi-Chun Huang, Chih-Hsiang Yao | 2019-01-01 |