QW

Qiuyang Wu

SY Synopsys: 1 patents #61 of 330Top 20%
📍 Portland, OR: #904 of 1,929 inventorsTop 50%
🗺 Oregon: #1,912 of 4,620 inventorsTop 45%
Overall (2019): #307,948 of 560,194Top 55%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10423742 Method to perform full accuracy hierarchical block level timing analysis with parameterized chip level contexts Martin Ranke, Min Li 2019-09-24