Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10482212 | Automated resistance and capacitance extraction and netlist generation of logic cells | Zudian Qin, Victor Moroz, Xi-Wei Lin | 2019-11-19 |
| 10311200 | Pre-silicon design rule evaluation | Victor Moroz, Terry Sylvan Kam-Chiu Ma, Xi-Wei Lin, Qiang Lu | 2019-06-04 |