GP

Girish A. Patankar

SY Synopsys: 1 patents #61 of 330Top 20%
📍 Cupertino, CA: #738 of 1,624 inventorsTop 50%
🗺 California: #27,528 of 67,890 inventorsTop 45%
Overall (2019): #459,163 of 560,194Top 85%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10254343 Layout-aware test pattern generation and fault detection Alodeep Sanyal, Rohit Kapur, Salvatore Talluto 2019-04-09