Issued Patents 2019
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10424581 | Sub 59 MV/decade SI CMOS compatible tunnel FET as footer transistor for power gating | Titash Rakshit, Mark S. Rodder | 2019-09-24 |
| 10381315 | Method and system for providing a reverse-engineering resistant hardware embedded security module | Harsono S. Simka, Ganesh Hegde, Joon Goo Hong, Mark S. Rodder | 2019-08-13 |
| 10361195 | Semiconductor device with an isolation gate and method of forming | Mark S. Rodder | 2019-07-23 |
| 10297673 | Methods of forming semiconductor devices including conductive contacts on source/drains | Jorge A. Kittl, Ganesh Hegde, Borna J. Obradovic, Mark S. Rodder | 2019-05-21 |