Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10504572 | Methods for addressing high capacity SDRAM-like memory without increasing pin cost | Dimin Niu, Hongzhong Zheng, Sun-Young Lim, Indong Kim, Jangseok Choi | 2019-12-10 |
| 10496543 | Virtual bucket multiple hash tables for efficient memory in-line deduplication application | Frederic Sala, Chaohong Hu, Hongzhong Zheng, Dimin Niu | 2019-12-03 |
| 10437482 | Coordinated near-far memory controller for process-in-HBM | Dimin Niu, Hongzhong Zheng | 2019-10-08 |
| 10394648 | Method to deliver in-DRAM ECC information through DDR bus | Dimin Niu, Hongzhong Zheng, Hyun-Joong Kim, Won-Hyung Song, Jangseok Choi | 2019-08-27 |
| 10394719 | Refresh aware replacement policy for volatile memory cache | Dimin Niu, Hongzhong Zheng | 2019-08-27 |
| 10347306 | Self-optimized power management for DDR-compatible memory systems | Dimin Niu, Hongzhong Zheng, Craig Hanson, Sun-Young Lim, Indong Kim +1 more | 2019-07-09 |
| 10318434 | Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application | Frederic Sala, Chaohong Hu, Hongzhong Zheng, Dimin Niu | 2019-06-11 |
| 10282294 | Mitigating DRAM cache metadata access overhead with SRAM metadata cache and bloom filter | Dimin Niu, Hongzhong Zheng | 2019-05-07 |
| 10268541 | DRAM assist error correction mechanism for DDR SDRAM interface | Dimin Niu, Hongzhong Zheng, Hyun-Joong Kim, Won-Hyung Song, Jangseok Choi | 2019-04-23 |
| 10223252 | Hybrid DRAM array including dissimilar memory cells | Dimin Niu, Hongzhong Zheng | 2019-03-05 |
| 10180906 | HBM with in-memory cache manager | Tyler Stocksdale, Hongzhong Zheng | 2019-01-15 |