Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10503661 | Providing memory bandwidth compression using compressed memory controllers (CMCs) in a central processing unit (CPU)-based system | Natarajan Vaidhyanathan, Colin Beaton Verrilli | 2019-12-10 |
| 10467092 | Providing space-efficient storage for dynamic random access memory (DRAM) cache tags | Natarajan Vaidhyanathan, Colin Beaton Verrilli | 2019-11-05 |
| 10236917 | Providing memory bandwidth compression in chipkill-correct memory architectures | Natarajan Vaidhyanathan, Luther James Blackwood, Michael R. Trombley, Colin Beaton Verrilli | 2019-03-19 |
| 10191850 | Providing memory bandwidth compression using multiple last-level cache (LLC) lines in a central processing unit (CPU)-based system | Colin Beaton Verrilli, Mark Anthony Rinaldi, Natarajan Vaidhyanathan | 2019-01-29 |
| 10176090 | Providing memory bandwidth compression using adaptive compression in central processing unit (CPU)-based systems | Colin Beaton Verrilli, Natarajan Vaidhyanathan | 2019-01-08 |
| 10176096 | Providing scalable dynamic random access memory (DRAM) cache management using DRAM cache indicator caches | Natarajan Vaidhyanathan, Colin Beaton Verrilli | 2019-01-08 |