Issued Patents 2019
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10521130 | Memory device including mixed non-volatile memory cell types | — | 2019-12-31 |
| 10510420 | Random telegraph signal noise reduction scheme for semiconductor memories | — | 2019-12-17 |
| 10504599 | Connecting memory cells to a data line sequentially while applying a read voltage to the memory cells and programming the read data to a single memory cell | Qiang Tang, Ramin Ghodsi | 2019-12-10 |
| 10490292 | Apparatuses and methods to control body potential in 3D non-volatile memory operations | Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu +2 more | 2019-11-26 |
| 10484718 | Memory having memory cell string and coupling components | — | 2019-11-19 |
| 10453538 | Apparatus and methods including establishing a negative body potential in a memory cell | Koji Sakui, Mark Hawes, Jeremy Binfet | 2019-10-22 |
| 10379738 | Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation | Shantanu R. Rajwade, Pranav Kalavade | 2019-08-13 |
| 10366759 | Memory devices having selectively electrically connected data lines | — | 2019-07-30 |
| 10354030 | Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information | — | 2019-07-16 |
| 10340015 | Apparatuses and methods for charging a global access line prior to accessing a memory | — | 2019-07-02 |
| 10310734 | Tier mode for access operations to 3D memory | — | 2019-06-04 |
| 10304498 | Interconnections for 3D memory | — | 2019-05-28 |
| 10282093 | Sequential memory access operations | — | 2019-05-07 |
| 10269431 | Memory devices having selectively electrically connected data lines | — | 2019-04-23 |
| 10262745 | Apparatuses and methods using dummy cells programmed to different states | Aaron Yip | 2019-04-16 |
| 10262739 | Devices including memory arrays, row decoder circuitries and column decoder circuitries | — | 2019-04-16 |
| 10242742 | Segmented memory and operation | Han Zhao | 2019-03-26 |
| 10224103 | Memory devices with a transistor that selectively connects a data line to another data line | — | 2019-03-05 |
| 10210940 | Memory read apparatus and methods | — | 2019-02-19 |
| 10203885 | Memory device including mixed non-volatile memory cell types | — | 2019-02-12 |
| 10170193 | Apparatus and methods of operating memory for negative gate to body conditions | — | 2019-01-01 |
| 10170490 | Memory device including pass transistors in memory tiers | — | 2019-01-01 |
| 10170196 | Apparatuses and methods to control body potential in 3D non-volatile memory operations | Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu +2 more | 2019-01-01 |
| 10170169 | Apparatuses and methods involving accessing distributed sub-blocks of memory cells | — | 2019-01-01 |