| 10509722 |
Memory device with dynamic cache management |
Kishore Kumar Muchherla, Peter Feeley, Ashutosh Malshe, Daniel J. Hubbard, Christopher S. Hale +3 more |
2019-12-17 |
| 10452282 |
Memory management |
Kishore Kumar Muchherla, Peter Feeley, Michael G. Miller, Preston A. Thomson, Renato C. Padilla +1 more |
2019-10-22 |
| 10446197 |
Optimized scan interval |
Kishore Kumar Muchherla, Ashutosh Malshe, Harish Reddy Singidi, Gianni Stephen Alsasua, Gary F. Besinga +1 more |
2019-10-15 |
| 10430262 |
Identifying asynchronous power loss |
Michael G. Miller, Ashutosh Malshe, Violante Moschiano, Peter Feeley, Gary F. Besinga +4 more |
2019-10-01 |
| 10430116 |
Correcting power loss in NAND memory devices |
Michael G. Miller, Kishore Kumar Muchherla, Harish Reddy Singidi, Renato C. Padilla, Gary F. Besinga +1 more |
2019-10-01 |
| 10418122 |
Threshold voltage margin analysis |
Kishore Kumar Muchherla, Abolfazl Rashwand |
2019-09-17 |
| 10403378 |
Performing an operation on a memory cell of a memory system at a frequency based on temperature |
Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Peter Feeley, Kishore Kumar Muchherla, Renato C. Padilla +1 more |
2019-09-03 |
| 10380018 |
Garbage collection |
Kishore Kumar Muchherla, Peter Feeley, Michael G. Miller, Daniel J. Hubbard, Renato C. Padilla +2 more |
2019-08-13 |
| 10366763 |
Block read count voltage adjustment |
Harish Reddy Singidi, Kishore Kumar Muchherla, Gianni Stephen Alsasua, Ashutosh Malshe, Gary F. Besinga +1 more |
2019-07-30 |
| 10365854 |
Tracking data temperatures of logical block addresses |
Kishore Kumar Muchherla, Peter Feeley, Ashutosh Malshe, Harish Reddy Singidi, Vamsi Pavan Rayaprolu |
2019-07-30 |
| 10359933 |
Memory devices and electronic systems having a hybrid cache including static and dynamic caches with single and multiple bits per cell, and related methods |
Kishore Kumar Muchherla, Ashutosh Malshe, Peter Feeley, Michael G. Miller, Christopher S. Hale +1 more |
2019-07-23 |
| 10354732 |
NAND temperature data management |
Kishore Kumar Muchherla, Preston A. Thomson, Harish Reddy Singidi, Jung Sheng Hoei, Peter Feeley +1 more |
2019-07-16 |
| 10347344 |
Read voltage calibration based on host IO operations |
Ashutosh Malshe, Kishore Kumar Muchherla, Harish Reddy Singidi, Peter Feeley, Kulachet Tanpairoj +1 more |
2019-07-09 |
| 10340016 |
Methods of error-based read disturb mitigation and memory devices utilizing the same |
Renato C. Padilla, Jung Sheng Hoei, Michael G. Miller, Roland J. Awusie, Kishore Kumar Muchherla +3 more |
2019-07-02 |
| 10325668 |
Operation of mixed mode blocks |
Kishore Kumar Muchherla, Ashutosh Malshe, Preston A. Thomson, Michael G. Miller, Gary F. Besinga +3 more |
2019-06-18 |
| 10318378 |
Redundant array of independent NAND for a three-dimensional memory array |
Jung Sheng Hoei, Renato C. Padilla, Kishore Kumar Muchherla, Sivagnanam Parthasarathy, Peter Feeley |
2019-06-11 |
| 10303535 |
Identifying asynchronous power loss |
Michael G. Miller, Ashutosh Malshe, Violante Moschiano, Peter Feeley, Gary F. Besinga +4 more |
2019-05-28 |
| 10303614 |
Memory having a static cache and a dynamic cache |
Christopher S. Hale, Kishore Kumar Muchherla |
2019-05-28 |
| 10283205 |
Preemptive idle time read scans |
Ashutosh Malshe, Harish Reddy Singidi, Kishore Kumar Muchherla, Michael G. Miller, John Zhang +1 more |
2019-05-07 |
| 10248594 |
Programming interruption management |
Preston A. Thomson, Kishore Kumar Muchherla |
2019-04-02 |
| 10223259 |
Memory device with dynamic storage mode control |
Yun Li, Kishore Kumar Muchherla, Peter Feeley, Ashutosh Malshe, Daniel J. Hubbard +2 more |
2019-03-05 |
| 10223198 |
Error rate reduction |
Deping He |
2019-03-05 |
