Issued Patents 2019
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10514862 | Memory device including concurrent suspend states for different operations | Aliasgar S. Madraswala, Karthikeyan Ramamurthi | 2019-12-24 |
| 10482974 | Operation of a memory device during programming | Violante Moschiano, Han Liu, Andrea D'Alessandro, Pranav Kalavade, Han Zhao +1 more | 2019-11-19 |
| 10446238 | Pseudo single pass NAND memory programming | Aliasgar S. Madraswala, Xin Guo, David B. Carlton | 2019-10-15 |
| 10354738 | One check fail byte (CFBYTE) scheme | Aliasgar S. Madraswala, Kristopher H. Gaewsky, Naveen Vittal Prabhu, Trupti Bemalkhedkar, Nehul N. Tailor +2 more | 2019-07-16 |
| 10325665 | Block by deck operations for NAND memory | Richard Fastow, Xin Sun, Uday Chandrasekhar, Krishna K. Parat, Camila Jaramillo +1 more | 2019-06-18 |
| 10268407 | Method and apparatus for specifying read voltage offsets for a read command | Aliasgar S. Madraswala, Xin Guo, Naveen Vittal Prabhu, Yu Du | 2019-04-23 |
| 10224107 | Method and apparatus for dynamically determining start program voltages for a memory device | Aliasgar S. Madraswala, Shantanu R. Rajwade, Trupti Bemalkhedkar, Leonard Aaron Turcios, Kristopher H. Gaewsky | 2019-03-05 |