Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10401279 | Process-induced distortion prediction and feedforward and feedback correction of overlay errors | Haiguang Chen, Jaydeep Sinha, Sathish Veeraraghavan | 2019-09-03 |
| 10379061 | Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool | Haiguang Chen, Jaydeep Sinha, Sergey Kamensky, Sathish Veeraraghavan | 2019-08-13 |
| 10249523 | Overlay and semiconductor process control using a wafer geometry metric | Sathish Veeraraghavan, Jaydeep Sinha | 2019-04-02 |