Issued Patents 2019
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10455690 | Grid array pattern for crosstalk reduction | David P. Chengson | 2019-10-22 |
| 10383213 | Placement of vias in printed circuit board circuits | David P. Chengson, Edward Chang, Santosh Kumar Pappu | 2019-08-13 |
| 10365314 | Electrical signature fault detection | David P. Chengson | 2019-07-30 |
| 10231325 | Placement of vias in printed circuit board circuits | David P. Chengson, Edward Chang, Santosh Kumar Pappu | 2019-03-12 |