Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10348307 | Clock distribution and generation architecture for logic tiles of an integrated circuit and method of operating same | Cheng C. Wang | 2019-07-09 |
| 10348308 | Clock architecture, including clock mesh fabric, for FPGA, and method of operating same | Abhijit M. Abhyankar, Cheng C. Wang | 2019-07-09 |