| 10523209 |
Test circuitry and techniques for logic tiles of FPGA |
— |
2019-12-31 |
| 10432196 |
Communication device, communication system and operation method thereof |
— |
2019-10-01 |
| 10429206 |
Counting device and pedometer device |
Hsi-Jung Tsai, Chih-Wei Tsai |
2019-10-01 |
| 10411712 |
FPGA having programmable powered-up/powered-down logic tiles, and method of configuring and operating same |
Anthony Kozaczuk, Valentin Ossman |
2019-09-10 |
| 10411711 |
FPGA having a virtual array of logic tiles, and method of configuring and operating same |
Anthony Kozaczuk, Abhijit M. Abhyankar |
2019-09-10 |
| 10348308 |
Clock architecture, including clock mesh fabric, for FPGA, and method of operating same |
Nitish U. Natu, Abhijit M. Abhyankar |
2019-07-09 |
| 10348307 |
Clock distribution and generation architecture for logic tiles of an integrated circuit and method of operating same |
Nitish U. Natu |
2019-07-09 |
| 10275017 |
Power circuit and memory device using the same |
Hsi-Jung Tsai |
2019-04-30 |
| 10250262 |
Integrated circuit including an array of logic tiles, each logic tile including a configurable switch interconnect network |
— |
2019-04-02 |
| 10237066 |
Multi-channel encryption and authentication |
Martin Langhammer, Shawn David Nicholl |
2019-03-19 |
| 10176865 |
Programmable decoupling capacitance of configurable logic circuitry and method of operating same |
— |
2019-01-08 |