Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10489305 | Prefetch kill and revival in an instruction cache | Bipin Prasad Heremagalur Ramaprasad, Abhijeet Ashok Chachad, Hung Ong | 2019-11-26 |
| 10311007 | Multicore bus architecture with non-blocking high performance transaction credit system | Timothy David Anderson, Joseph Zbiciak, Abhijeet Ashok Chachad, Kai Chirca, Matthew D. Pierson | 2019-06-04 |