Issued Patents 2019
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10268122 | Techniques to achieve area reduction through co-optimizing logic core blocks and memory redundancies | Silvio E. Bou-Ghazale, Niti Goel | 2019-04-23 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10268122 | Techniques to achieve area reduction through co-optimizing logic core blocks and memory redundancies | Silvio E. Bou-Ghazale, Niti Goel | 2019-04-23 |