Issued Patents 2019
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10489535 | Method and apparatus for reducing constraints during rewind structural verification of retimed circuits | Mahesh A. Iyer | 2019-11-26 |
| 10296701 | Retiming with fixed power-up states | Mahesh A. Iyer, Robert Walker | 2019-05-21 |
| 10255404 | Retiming with programmable power-up states | Mahesh A. Iyer, Robert Walker | 2019-04-09 |