Issued Patents 2019
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10498314 | Vectored flip-flop | Amit Agarwal, Simeon Realov | 2019-12-03 |
| 10491217 | Low-power clock gate circuit | Amit Agarwal, Simeon Realov, Iqbal Rajwani, Ram Krishnamurthy | 2019-11-26 |
| 10473718 | Multibit vectored sequential with scan | Amit Agarwal, Ram Krishnamurthy, Satish K. Damaraju, Simeon Realov | 2019-11-12 |
| 10418975 | Low clock supply voltage interruptible sequential | Amit Agarwal, Ram Krishnamurthy | 2019-09-17 |
| 10382019 | Time borrowing flip-flop with clock gating scan multiplexer | Amit Agarwal, Simeon Realov, Ram Krishnamurthy | 2019-08-13 |
| 10193536 | Shared keeper and footer flip-flop | Amit Agarwal, Simeon Realov, Iqbal Rajwani, Ram Krishnamurthy | 2019-01-29 |
| 10177765 | Integrated clock gate circuit with embedded NOR | Amit Agarwal, Iqbal Rajwani, Simeon Realov, Ram Krishnamurthy | 2019-01-08 |