Issued Patents 2019
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10359461 | Integrated circuit protection during high-current ESD testing | Shunhua T. Chang, James P. Di Sarro, Robert J. Gauthier, Jr., Souvick Mitra | 2019-07-23 |
| 10181463 | Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers | James P. Di Sarro, Robert J. Gauthier, Jr., Junjun Li, Souvick Mitra | 2019-01-15 |