Issued Patents 2019
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522849 | Electrochemical cell comprising channel-type flowable electrode units | Dong-Kook Kim, Sung-Il Jeon, Ko-Yeon Choo, Younghyun Cho, Jeong Gu Yeo +7 more | 2019-12-31 |
| 10503502 | Data element rearrangement, processors, methods, systems, and instructions | Christopher J. Hughes | 2019-12-10 |
| 10496410 | Instruction and logic for suppression of hardware prefetchers | Alexander Heinecke, Christopher J. Hughes, Daehyun Kim | 2019-12-03 |
| 10482156 | Sparsity-aware hardware accelerators | Abdulkadir Utku Diril, Nadav Rotem, Mikhail Smelyanskiy | 2019-11-19 |
| 10474430 | Mixed-precision processing elements, systems, and methods for computational models | Abdulkadir Utku Diril, Mikhail Smelyanskiy, Nadav Rotem | 2019-11-12 |
| 10409727 | System, apparatus and method for selective enabling of locality-based instruction handling | Berkin Akin, Rajat Agarwal, Christopher J. Hughes, Chiachen Chou | 2019-09-10 |
| 10402336 | System, apparatus and method for overriding of non-locality-based instruction handling | Berkin Akin, Rajat Agarwal, Christopher J. Hughes | 2019-09-03 |
| 10372787 | Hardware accelerator pre-configured with coefficients for matrix-transform operations | Nadav Rotem, Mikhail Smelyanskiy, Abdulkadir Utku Diril | 2019-08-06 |
| 10372090 | Three-dimensional (3D) building information providing device and method | — | 2019-08-06 |
| 10303606 | Dynamic home tile mapping | Christopher J. Hughes, Daehyun Kim, Richard M. Yoo | 2019-05-28 |
| 10198264 | Sorting data and merging sorted data in an instruction set architecture | Asit K. Mishra, Deborah T. Marr, Nadathur Rajagopalan Satish, Mikhail Smelyanskiy, Michael Anderson +3 more | 2019-02-05 |