Issued Patents 2019
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10394711 | Managing lowest point of coherency (LPC) memory using a service layer adapter | Etai Adar, Lakshminarayana B. Arimilli, Bartholomew Blaner, William J. Starke, Jeffrey A. Stuecheli | 2019-08-27 |
| 10310909 | Managing execution of computer operations with non-competing computer resource requirements | Eyal Gonen, Alexander Mesh | 2019-06-04 |
| 10296253 | Coordination of spare lane usage between link partners | Etai Adar, Pavel Granovsky | 2019-05-21 |
| 10243866 | Controlling packet data transmissions via data transmission media | Oren Lev, Tomer Z. Metz | 2019-03-26 |
| 10216653 | Pre-transmission data reordering for a serial interface | Lakshminarayana B. Arimilli, Bartholomew Blaner, Daniel M. Dreps, John D. Irish, David J. Krolak +6 more | 2019-02-26 |
| 10169247 | Direct memory access between an accelerator and a processor using a coherency adapter | Etai Adar, Lakshminarayana B. Arimilli | 2019-01-01 |