Issued Patents 2019
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10437755 | Techniques for handling interrupts in a processing unit using virtual processor thread groups | Florian A. Auernhammer | 2019-10-08 |
| 10423550 | Managing efficient selection of a particular processor thread for handling an interrupt | Florian A. Auernhammer, Wayne M. Barrett, Robert Allen Drehmel, Guy L. Guthrie, Michael S. Siegel +1 more | 2019-09-24 |
| 10289479 | Hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2019-05-14 |
| 10255194 | Configurable I/O address translation data structure | Benjamin Herrenschmidt, Eric N. Lais, Steven M. Thurber | 2019-04-09 |
| 10241923 | Configurable I/O address translation data structure | Benjamin Herrenschmidt, Eric N. Lais, Steven M. Thurber | 2019-03-26 |
| 10229075 | Techniques for escalating interrupts in a processing unit using virtual processor thread groups and software stack levels | Florian A. Auernhammer | 2019-03-12 |
| 10216568 | Live partition mobility enabled hardware accelerator address translation fault resolution | Lakshminarayana B. Arimilli, Bartholomew Blaner | 2019-02-26 |
| 10169270 | Techniques for handling interrupt related information in a data processing system | Florian A. Auernhammer | 2019-01-01 |