Issued Patents 2019
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10402324 | Memory access for busy memory by receiving data from cache during said busy period and verifying said data utilizing cache hit bit or cache miss bit | Kevin T. Lim, Parthasarathy Ranganathan, William C. Hallowell | 2019-09-03 |
| 10331560 | Cache coherence in multi-compute-engine systems | Jichuan Chang | 2019-06-25 |
| 10318365 | Selective error correcting code and memory access granularity switching | Norman Paul Jouppi, Doe Hyun Yoon | 2019-06-11 |
| 10241711 | Multiversioned nonvolatile memory hierarchy for persistent memory | Doe Hyun Yoon, Jishen Zhao, Norman Paul Jouppi | 2019-03-26 |