PA

Puneet Arora

CS Cadence Design Systems: 5 patents #9 of 394Top 3%
HP HP: 2 patents #244 of 1,243Top 20%
📍 Atrauli, TX: #2 of 2 inventorsTop 100%
Overall (2019): #13,100 of 560,194Top 3%
8
Patents 2019

Issued Patents 2019

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
10504607 Multiple-channel, programmable fuse control unit Steven Lee Gregor, Norman Robert Card 2019-12-10
10482989 Dynamic diagnostics analysis for memory built-in self-test Steven Lee Gregor, Norman Robert Card 2019-11-19
10395747 Register-transfer level design engineering change order strategy Steven Lee Gregor, Norman Robert Card 2019-08-27
10387599 Systems, methods, and computer-readable media utilizing improved data structures and design flow for programmable memory built-in self-test (PMBIST) Steven Lee Gregor, Norman Robert Card 2019-08-20
10319459 Customizable built-in self-test testplans for memory units Steven Lee Gregor, Norman Robert Card 2019-06-11
10216464 Wireless communication of print content and a mobile device identifier Kumaravel Ganesan 2019-02-26
10192013 Test logic at register transfer level in an integrated circuit design Ankit Bandejia, Navneet Kaushik, Steven Lee Gregor 2019-01-29
10185524 Print reservation Dhanendra Jain, Gurpreet Singh Bhatia, Kumaravel Ganesan, Ritesh Jha 2019-01-22