KM

Kamlesh Kumar Madheshiya

CS Cadence Design Systems: 1 patents #113 of 394Top 30%
📍 San Jose, CA: #2,930 of 6,652 inventorsTop 45%
🗺 California: #27,528 of 67,890 inventorsTop 45%
Overall (2019): #558,498 of 560,194Top 100%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10248746 Method and apparatus for estimating ideal power of an integrated circuit design Ajay Singh Bisht, Jayanta Roy, Kunwar Prashant 2019-04-02