AF

Andrey Freidlin

CS Cadence Design Systems: 2 patents #48 of 394Top 15%
📍 Surovikino, RU: #1 of 1 inventorsTop 100%
Overall (2019): #193,181 of 560,194Top 35%
2
Patents 2019

Issued Patents 2019

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10216888 Constraint validation process Mikhail Kanshin, Alexey Kalinov, Andrei Savelev, Douglas M. Den Dulk, Wojciech Wojciak 2019-02-26
10210301 System and method for implementing and validating star routing for power connections at chip level Ankur Chavhan, Devesh Jain, Behnam Farhat, Sundararajan Shanmugam, Susan ZHANG 2019-02-19