AR

Abhishek Raheja

CS Cadence Design Systems: 1 patents #113 of 394Top 30%
📍 Noida, CA: #12 of 24 inventorsTop 50%
Overall (2019): #557,058 of 560,194Top 100%
1
Patents 2019

Issued Patents 2019

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
10325042 Debugging failures in X-propagation logic circuit simulation Amit Sharma, Amit Aggarwal, Amit Dua, Manu Chopra, Vincent Gregory Reynolds 2019-06-18