| 10522193 |
Processor with host and slave operating modes stacked with memory |
Gabriel H. Loh, Bradford M. Beckmann, James M. O'Connor, Lisa R. Hsu |
2019-12-31 |
| 10503641 |
Cache coherence for processing in memory |
Michael W. Boyer |
2019-12-10 |
| 10409343 |
Control system and architecture for incorporating microelectromechanical (MEM) switches in fluid-based cooling of 3D integrated circuits |
Alexander D. Breslow, Dong Zhang |
2019-09-10 |
| 10382410 |
Memory operation encryption |
Dong Zhang |
2019-08-13 |
| 10310981 |
Method and apparatus for performing memory prefetching |
Yasuko Eckert, Reena Panda, Onur Kayiran, Michael W. Boyer |
2019-06-04 |
| 10310997 |
System and method for dynamically allocating memory to hold pending write requests |
Amin Farmahini Farahani, David A. Roberts |
2019-06-04 |
| 10282308 |
Method and apparatus for reducing TLB shootdown overheads in accelerator-based systems |
Andrew G. Kegel |
2019-05-07 |
| 10282292 |
Cluster-based migration in a multi-level memory hierarchy |
Andreas Prodromou, Mitesh R. Meswani, Arkaprava Basu, Gabriel H. Loh |
2019-05-07 |
| 10282309 |
Per-page control of physical address space distribution among memory modules |
Hyojong Kim, Hyesoon Kim |
2019-05-07 |
| 10268416 |
Method and systems of controlling memory-to-memory copy operations |
David A. Roberts |
2019-04-23 |
| 10242420 |
Preemptive context switching of processes on an accelerated processing device (APD) based on time quanta |
Robert Scott Hartog, Ralph C. Taylor, Michael Mantor, Kevin J. McGrath, Sebastien Nussbaum +4 more |
2019-03-26 |
| 10198369 |
Dynamic memory remapping to reduce row-buffer conflicts |
Yasuko Eckert, Reena Panda |
2019-02-05 |