Issued Patents 2018
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9984196 | Method and apparatus for modeling multi-terminal MOS device for LVS and PDK | Chau-Wen Wei, Cheng-Te Chang, Chih-Ming Yang, Yi-Kan Cheng | 2018-05-29 |
| 9922160 | Integrated circuit stack verification method and system for performing the same | Feng-Wei Kuo, Shuo-Mao Chen, Kai-Yun Lin, Ho-Hsiang Chen, Chewn-Pu Jou | 2018-03-20 |